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IHEP 2002 - 20 (In Russian) | |
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| L.L.Kurchaninov, M.V.Vasil'ev, A.M.Moiseev, V.A.Sen'ko, M.M.Soldatov, N.A.Shalanda, E.A.Usenko, Yu.P.Tsyupa, V.I.Yakimchuk | ||
| Readout Electronics of the SVD Vertex Detector | ||
| Protvino, 2002.- p.17, figs. 12, table 6, refs.:12. | ||
The architecture of the readout electronics for the silicon vertex detector of SVD setup is described. The choice of preamplifier chips for trigger and tracking parts of detector is argued. Block diagrams and timing of signals are presented for the readout modules, control unit and data compressor for the second level trigger. The electronics calibration of the vertex detector is discussed. The distribution of control signals is also addressed.
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