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IHEP 2005 - 4 (In Russian) | |
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| V.A.Kokovin, V.V.Komarov | ||
| Network Controller of IHEP Accelerators Complex General Timimg System | ||
| Protvino, 2005. p. 9, figs.: 5, table: 2, refs.: 6. | ||
The paper describes the functionalities of the Timing Network Controller module directing the timing information flows in the General Timing System of the IHEP accelerators complex. The module realization has been presented as a set of the digital automatic devices with the finite number of the inner states. The peculiarities of both the processing of the parallel input timing information flows and the commutation of these flows to global and local buses of the Timing Network have been considered. The module channels capacity and probability of the timing messages losses have been estimated. The application of the modern Altera firm FPGA as a basic component for the Timing Network Controller module is well grounded.
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